stm32_part1 More progress on first draft, admonition fixes

content/about.md

@@ -24,10 +24,9 @@ you are on a mobile device, and my full public key:
 `70A4 AA02 555D BD55 9189  B4E0 F32B E05E ADAA 54FC`[^2]
 </center>
 
-{{% admonition info "Public Key" true %}}
+{{< admonition info "Public Key" true >}}
 ```
 -----BEGIN PGP PUBLIC KEY BLOCK-----
-
 mQINBFoTpoMBEADDIjRewOTvJBQF4ZxK/LS7yBL0TuU7VbZzEH3s5YKj63P/Rmvx
 8/jMm0iop+uiPNo+0imIGYsdfW77bt95I9+kBm27eVf8mDMldMiS/LBCCmnuQ19u
 uCq1Fd1O9JQyqxOegianl73NqtvG1UHXmnjdskDJ0N1hP0I7//g61TQkj+Qih8oI
@@ -146,7 +145,7 @@ KpNnEkXDMtMCsNkEMzM+3/BkuxLO52zYpDe5tV7Igx0=
 -----END PGP PUBLIC KEY BLOCK-----
 
 ```
-{{% /admonition %}}
+{{< /admonition >}}
 
 # Resume
 I do not currently keep an up-to-date version of my resume. In the past, I have

content/post/emacs_clang_libopencm3.md

@@ -95,13 +95,13 @@ For an STM32F0 project, the context of the `.clang_complete` file would be:
 <sub>The above assumes that `libopencm3` is also places within the project
 directory</sub>
 
-{{% admonition warning Note %}}
+{{< admonition warning Note >}}
 There is a strange issue that is encountered with non-working completion for new
 header include statements. The workaround for this includes running `M-x irony-server-kill`after new header
 additions to your current working file. Irony's server is clever enough to
 restart itself after a completion request is triggered via `TAB` so this is a
 fairly uninvolved workaround.
-{{% /admonition %}}
+{{< /admonition >}}
 
 ## Example
 {{< img src="/static/img/emacs-clang-libopencm3/completion.png"

content/post/gpg_best_practices_and_git.md

@@ -84,37 +84,37 @@ this via:
 + **Debian/Ubuntu, RHEL:** `sudo update-ca-certificates`
 
 
-{{% admonition tip "CA Path" %}}
+{{< admonition tip "CA Path" >}}
 On my system the full path to the CA certs is:
 
 - `/etc/ca-certificates/extracted/cadir/sks-keyservers.net_CA.pem`
-{{% /admonition %}}
+{{< /admonition >}}
 
 Two following parameters should be added to your `~/.gnupg` configuration files:
 
 ### GnuPG Versions >2.1
 
 
-{{% admonition note "gpg.conf" %}}
+{{< admonition note "gpg.conf" >}}
 ```
 keyserver hkps://hkps.pool.sks-keyservers.net
 ```
-{{% /admonition %}}
+{{< /admonition >}}
 
 
-{{% admonition note "dirmngr.conf" %}}
+{{< admonition note "dirmngr.conf" >}}
 ```
 hkp-cacert /etc/ca-certificates/path/to/CA.pem
 ```
-{{% /admonition %}}
+{{< /admonition >}}
 
 ### GnuPG Versions <2.1
-{{% admonition note "gpg.conf" %}}
+{{< admonition note "gpg.conf" >}}
 ```
 keyserver hkps://hkps.pool.sks-keyservers.net
 keyserver-options ca-cert-file=/path/to/CA/sks-keyservers.netCA.pem
 ```
-{{% /admonition %}}
+{{< /admonition >}}
 
 ## *Optional* - Ensure keys refreshed through keyserver
 To ensure no keys are pulled from insecure sources, or that an attacked would

content/post/humble-beginnings.md

@@ -13,11 +13,11 @@ from WordPress)
 
 <!--more-->
 # Disclaimer
-{{% admonition warning "Out of Date" %}}
+{{< admonition warning "Out of Date" >}}
 The information in this article is **out-of-date**. I am, and have been, using my
 own fork of the [hugo-even-theme](https://gitlab.com/bdebyl/hugo-theme-even) on
 my [GitLab](https://gitlab.com/bdebyl) profile.
-{{% /admonition %}}
+{{< /admonition >}}
 
 ---
 

content/post/password_checker.md

@@ -62,10 +62,10 @@ It may be worth mentioning, to folks less familiar with `awk`, that the
 being piped into `sha1sum`. I discovered incorrect `sha1sum` outputs **without**
 `FNR==1` resulting in a useless password check!
 
-{{% admonition note Note %}}
+{{< admonition note Note >}}
 `IFS=` would not have fixed the above newline issue, as the problem stems
 from the output of `pass "$p"` and **not** the filenames.
-{{% /admonition %}}
+{{< /admonition >}}
 
 That takes care of gathering our passwords, but we'll revisit this again in the
 next part.
@@ -108,10 +108,10 @@ it's weak (_i.e. "Exists in attack dictionary", "Too short", etc._) was to use
 well-documented or fully-fledged application to fully determine password
 strength though for my purposes it will be good enough (_I don't care to write
 my own version of this, yet.._).
-{{% admonition note Note %}}
+{{< admonition note Note >}}
 I made this part of the script **optional**, as not every user would want to
 install `cracklib` on their system.
-{{% /admonition %}}
+{{< /admonition >}}
 
 This addition was made in the following order:
 

content/post/stm32-part0.md

@@ -14,17 +14,20 @@ series: turn on the lights!
 
 <!--more-->
 
-{{% admonition warning "Windows Users" %}}
+{{< admonition warning "Windows Users" >}}
 This series of write-ups assumes the reader is on a Linux operating
 system. Windows users _can_ utilize the [**Windows Subsystems for
 Linux**](https://docs.microsoft.com/en-us/windows/wsl/install-win10) though your
 mileage may vary!
-{{% /admonition %}}
+
+{{< /admonition >}}
 
 # Straight to the Chase
 
 For those that want to cut to the chase and save time, here is the full source
 code with friendly names to get you started:
+
+{{< admonition note "Source Code" true >}}
 ```C
 #include <libopencm3/stm32/gpio.h>
 #include <libopencm3/stm32/rcc.h>
@@ -41,8 +44,8 @@ int main(void) {
 
     while (1);
 }
-
 ```
+{{< /admonition >}}
 
 # Getting Started with libopencm3
 [libopencm3](https://github.com/libopencm3/libopencm3) is a very powerful,
@@ -114,11 +117,11 @@ Makefile's variables of things you may want to change:
 
 # Explanation
 
-{{% admonition info "Naming Convention" %}}
+{{< admonition info "Naming Convention" >}}
 As a note to the reader: below I will not refer to the GPIO port or pins using
 the `#define` friendly names from above. This is purely for the sake
 of clarity in hopes of avoiding confusion.
-{{% /admonition %}}
+{{< /admonition >}}
 
 Although the source code is fairly simple, lets dive into it at least
 _somewhat_.

content/post/stm32-part1.md

@@ -1,5 +1,5 @@
 ---
-title: "STM32 with libopencm3 - Part 1: Simple Timer"
+title: "STM32F0 with libopencm3 - Part 1: Simple Timer"
 date: 2020-02-12
 lastmod: 2020-02-12
 draft: true
@@ -8,7 +8,7 @@ categories: ["Tutorial"]
 contentCopyright: false
 hideHeaderAndFooter: false
 ---
-After having reviewed [part 0](/post/stm32-part0) of this series, we can now
+After having reviewed [**Part 0**](/post/stm32-part0) of this series, we can now
 explore controlling GPIO with the hardware timers! Other tutorials have used the
 Systick timer as a good introduction to adding a delay for blinking an
 LED. However, it is my belief that this leads to confusion for beginners and
@@ -16,3 +16,100 @@ only opens the door to misunderstandings. That being said, we will be using
 timers and their associated GPIO ports with Alternate Function modes.
 
 <!--more-->
+
+# Straight to the Chase
+
+For those that want to cut to the chase and save time, here is the full source
+code with friendly names to get you started:
+
+{{< admonition note "Source Code" true >}}
+```C
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/stm32/rcc.h>
+#include <libopencm3/stm32/timer.h>
+
+#define LED_PORT    GPIOC
+#define LED_PIN_BLU GPIO8
+#define LED_PIN_GRN GPIO9
+#define TIM_PSC_DIV 48000
+#define SECONDS     1
+
+volatile unsigned int i;
+
+int main(void) {
+    rcc_clock_setup_in_hsi_out_48mhz();
+    rcc_periph_clock_enable(RCC_GPIOC);
+    rcc_periph_clock_enable(RCC_TIM3);
+
+    gpio_mode_setup(LED_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, LED_PIN_BLU | LED_PIN_GRN);
+    gpio_set_output_options(LED_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_HIGH, LED_PIN_BLU | LED_PIN_GRN);
+    gpio_set_af(LED_PORT, GPIO_AF0, LED_PIN_BLU | LED_PIN_GRN);
+
+    timer_set_mode(TIM3, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_CENTER_1, TIM_CR1_DIR_UP);
+
+    // The math for seconds isn't quite right here
+    timer_set_prescaler(TIM3, (rcc_apb1_frequency/TIM_PSC_DIV)/2*SECONDS);
+    timer_disable_preload(TIM3);
+    timer_continuous_mode(TIM3);
+    timer_set_period(TIM3, TIM_PSC_DIV);
+
+    timer_set_oc_mode(TIM3, TIM_OC3, TIM_OCM_PWM1);
+    timer_set_oc_mode(TIM3, TIM_OC4, TIM_OCM_PWM2);
+
+    int tim_oc_ids[2] = { TIM_OC3, TIM_OC4 };
+
+    for (i = 0; i < (sizeof(tim_oc_ids)/sizeof(tim_oc_ids[0])); ++i) {
+        timer_set_oc_value(TIM3, tim_oc_ids[i], (TIM_PSC_DIV/2));
+    }
+
+    timer_enable_oc_output(TIM3, TIM_OC3);
+    timer_enable_oc_output(TIM3, TIM_OC4);
+
+    timer_enable_counter(TIM3);
+
+    while (1) {
+        ;
+    }
+
+    return 0;
+}
+```
+{{< /admonition >}}
+
+# Set up the GPIO
+Assuming the reader is either familiar with GPIO setup for the STM32F0, or has
+reviewed [**Part 0**](/post/stm32-part0) of this series we will set up the GPIO
+pins tied to the LEDs (_port C, pins 8 and 9_) in the Alternate Function mode.
+
+## Alternate Functions
+The STM32 microcontroller's GPIO has a hardware feature allowing you to tie
+certain port's pins to a different register as part of the output or input
+control:
+{{< img src="/static/img/stm32-examples/part1/stm32-af-diagram.png"
+    sub="GPIO Alternate Function Diagram" >}}
+
+For accomplishing this, a few things need to happen:
+
+1. The desired GPIO pins need to be set to `GPIO_MODE_AF` in `gpio_mode_setup()`
+1. The alternate function mode number `GPIO_AFx` has to be set for the pins using `gpio_set_af()`
+
+{{< admonition warning "Note for Different STM32Fx Microcontrollers" >}}
+Review the datasheet for the specific **STM32Fx** microcontroller being
+programmed, as the Alternate Function mappings may be *significantly* different!
+{{< /admonition >}}
+
+
+## GPIO Alternate Function Setup
+For the STM32F0 we are using in this series, the Alternate Function selection
+number desired is `GPIO_AF0` for use with `TIM3_CH3` (_timer 3, channel 3_) and
+`TIM3_CH4` (_timer 3, channel 4_):
+{{< img src="/static/img/stm32-examples/part1/stm32-af-gpiomap.png"
+    sub="STM32F051 Alternate Function Mapping" >}}
+
+
+Ultimately, the code with `libopencm3` becomes the following for our use case:
+```C
+gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO8 | GPIO9);
+gpio_set_output_options(GPIOC, GPIO_OTYPE_PP, GPIO_OSPEED_HIGH, GPIO8 | GPIO9);
+gpio_set_af(GPIOC, GPIO_AF0, GPIO8 | GPIO9);
+```